1. Field of Invention
The present invention relates to a fabrication method for an integrated circuit (IC). More particularly, the present invention relates to a method of fabricating a mixed circuit capacitor.
2. Description of Related Art
A mixed circuit generally means a circuit having both a digital device and an analog device in a logic area of a semiconductor chip. The digital device can be an inverter, and an adder, whereas the analog device can be an amplifier, an analog/digital (A/D) converter, and so on. Typically, the mixed circuit has a capacitor structure therein for storing charges.
FIGS. 1A and 1B are schematic, cross-sectional diagrams illustrating a conventional method for fabricating a mixed circuit capacitor.
Referring to FIG. 1A, in the conventional fabrication process for the mixed circuit, a fabrication process for the capacitor begins with coating a metal layer 102 for forming a lower electrode on a substrate 100. Then, a dielectric layer 104 and a metal layer 106 for forming an upper electrode are formed in sequence on the metal layer 102, so that the dielectric layer 104 is located between the upper electrode and the lower electrode. The metal layer 106 and the dielectric layer 104 are patterned, followed by patterning the metal layer 102 so as to result formation of the capacitor, as shown in FIG. 1B.
The capacitor formed as described above has, in terms of area, a smaller upper electrode than the lower electrode, while the dielectric layer 104 is very thin. Therefore, an etching process can not stop on the dielectric layer 104, when the metal layer 106 is patterned to form the upper electrode. As a result, the dielectric layer 104 is usually etched through by an etching solution, so that a part of the metal layer 102 below the metal layer 106 is exposed. This produces a problem, such as a sidewall leakage.